Early voltage and saturation voltage improvement in deep sub-micron technologies using associations of transistors

ABSTRACT

The design of analog integrated circuits together with mixed-signal applications in deep sub-micron technologies is a difficult task, since state-of-the-art technologies and minimum channel length transistors, suitable for digital circuits, are very rarely optimized for analog block design. Non-desired effects are present shortest transistors, leading mainly to a high output conductance, which is disadvantageous for gain in the stages. In this work, we present measurement results supporting the associations of transistors concept to be used in such applications: the T-Shaped Transistor (TST). The main characteristic of this association is its trapezoidal nature, with no limit on the sizes of the unit composite transistors, providing lower output conductance and saturation voltage in comparison to regular configurations. Such electrical characteristics are demonstrated by means of electrical simulations and electrical measurements of a test chip fabricated by MOSIS in an IBM 0.18μm CMOS process.

REFERENCES

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Advanced technologies

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: VLSI (very large scale integration)
      B.7.2 Design Aids
          Subjects: Simulation

General Terms:
Design, Measurement, Verification

Keywords:
TAT, TST, association of transistors, device modeling, measurements