A 40mhz 70db gain variable gain amplifier design using the gm/id design method

ABSTRACT

This paper addresses the design of a 40MHz CMOS Variable Gain Amplifier (VGA) with a 0 to 70dB gain control range, using the gm/ID design method. The VGA architecture is based on a differential pair stage with an automatic continuous-time offset cancellation circuitry, providing an input offset voltage tolerance up to 50mV. The 3-stage VGA was designed and fabricated through MOSIS service in an IBM 0.18µm CMOS process. The VGA dissipates 2.6mA from a 1.8V supply while occupying a 34,840µm2 of chip area, excluding bond-pads.

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.m Miscellaneous

General Terms:
Design, Measurement, Performance

Keywords:
Variable Gain Amplifier (VGA), amplifier, cmos analog design, rf front-end