MIMD implementation with PicoBlaze microprocessor using MPI functions

ABSTRACT

The article represents an approach of designing multiprocessor parallel architecture based on message passing paradigm in one of the Xilinx Spartan 3 family chips. Compared to the Flynn's taxonomy it falls in MIMD architectures with SPMD program model. Each node consist PicoBlaze -- 8-bits RISC microcontroller, local memory and communication assistant. Nodes are connected using custom-made network switch. Software abstraction model of the system is hierarchically designed in three layers. The lowest one is responsible for communication protocols and State Machines. The second one consists implementations of MPI_Send and MPI_Receive functions, which deliver abstraction for layer three -- program realization. Evaluation of the system is made -- system acceleration is measured using scalability of data and hardware resources.

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INDEX TERMS

Keywords:
FPGA, MIMD, MPI functions, PicoBlaze, VHDL, message passing system, parallel computer architecture, system-on-chip