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Performance optimal processor throttling under thermal constraints
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International Conference on Compilers, Architecture and Synthesis for Embedded Systems archive
Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems table of contents
Salzburg, Austria
SESSION: Low power and thermal-aware architectures table of contents
Pages: 257 - 266  
Year of Publication: 2007
ISBN:978-1-59593-826-8
Authors
Ravishankar Rao  Arizona State University
Sarma Vrudhula  Arizona State University
Sponsors
ACM: Association for Computing Machinery
SIGBED: ACM Special Interest Group on Embedded Systems
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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ABSTRACT

We derive analytically, the performance optimal throttling curve for a processor under thermal constraints for a given task sequence. We found that keeping the chip temperature constant requires an exponential speed curve. Earlier works that propose constant throttling only keep the package/case temperature constant, and are hence suboptimal. We develop high-level thermal and power models that are simple enough for analysis, yet account for important effects like the power-density variation across a chip (hotspots), leakage dependence on temperature (LDT), and differing thermal characteristics of the silicon die and the thermal solution. We use a piecewise-linear approximation for the exponential leakage dependence on temperature, and devise a method to remove the circular dependency between leakage power and temperature. To solve the multi-task speed control problem, we first solve analytically, the single task problem with a constraint on the final package temperature using optimal control theory. We then find the optimum final package temperature of each task by dynamic programming. We compared the total execution time of several randomly generated task sequences using the optimal control policy against a constant speed throttling policy, and found significantly smaller total execution times. We compared the thermal profiles predicted by the proposed high-level thermal model to that of the Hotspot thermal model, and found them to be in good agreement.


REFERENCES

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W. Huang, M. R. Stan, K. Skadron, K. Sankaranarayanan, and S. Ghosh, 'Hotspot: A compact thermal modeling method for cmos vlsi systems,' IEEE Trans. VLSI Sys., vol. 14, no. 5, pp. 501--513, May 2006.
 
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W. Liao, L. He, and K. M. Lepak, 'Temperature and supply voltage aware performance and power modeling at microarchitecture level,' IEEE Trans. Computer-Aided Design, vol. 24, no. 7, pp. 1042--1053, July 2005.
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CPU Thermal Management: Application Note, Advanced Micro Devices. {Online}. Available: http://www.amd.com/epd/processors/6.32bitproc/x18448/18448.pdf
 
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AMD Athlon 64 Processor Power and Thermal Data Sheet, Advanced Micro Devices, August 2004.


Collaborative Colleagues:
Ravishankar Rao: colleagues
Sarma Vrudhula: colleagues