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An evolutionary platform for developing next-generation electronic circuits
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Genetic And Evolutionary Computation Conference archive
Proceedings of the 2007 GECCO conference companion on Genetic and evolutionary computation table of contents
London, United Kingdom
SESSION: Late-breaking papers table of contents
Pages 2483-2488  
Year of Publication: 2007
ISBN:978-1-59593-698-1
Authors
James A. Hilder  University of York, York, United Kingdom
Andy M. Tyrrell  University of York, York, United Kingdom
Sponsors
ACM: Association for Computing Machinery
SIGEVO: ACM Special Interest Group on Genetic and Evolutionary Computation
Publisher
ACM  New York, NY, USA
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ABSTRACT

In this paper, a new method for evolving simple electronic circuits is discussed, with the aim of improving the reliability and performance of basic circuit blocks. Next-generation CMOS device models will be used in the simulation of circuits. Circuits are mapped to a grid layout which reflects the appearance of conventional schematic blocks. The performance of the system at designing passive low-pass filters is discussed, with an outline given of the intended future steps, towards the goal of integrating sub 100 nm MOSFET models into the circuits.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
James A. Hilder: colleagues
Andy M. Tyrrell: colleagues