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Performance aware secure code partitioning
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Source Design, Automation, and Test in Europe archive
Proceedings of the conference on Design, automation and test in Europe table of contents
Nice, France
SESSION: Secure systems table of contents
Pages: 1122 - 1127  
Year of Publication: 2007
ISBN:978-3-9810801-2-4
Authors
S. H. K. Narayanan  The Pennsylvania State University
M. Kandemir  The Pennsylvania State University
R. Brooks  Clemson University
Sponsors
: IEEE Council on Electronic Design Automation (CEDA)
: The EDA Consortium
EDAA : European Design and Automation Association
SIGDA : ACM Design Automation
RAS : RAS
: The IEEE Computer Society TTTC
: ECSI
Publisher
EDA Consortium  San Jose, CA, USA
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ABSTRACT

Many embedded applications exist where decisions are made using sensitive information. A critical issue in such applications is to ensure that data is accessed only by authorized computing entities. In many scenarios, these entities do not rely on each other, yet they need to work on a secure application in parallel to complete application execution under the specified deadline. Our focus in this paper is on compiler-guided secure code partitioning among a set of hosts. The scenario targeted involves a set of hosts that want to execute a secure embedded application in parallel. The various hosts have different levels of access to the data structures manipulated in the application. Our approach partitions the application among the hosts such that the load imbalance across hosts is minimized to reduce execution time while ensuring that no security leak occurs.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
S. H. K. Narayanan: colleagues
M. Kandemir: colleagues
R. Brooks: colleagues