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Data access microarchitectures for superscalar processors with compiler-assisted data prefetching
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Source International Symposium on Microarchitecture archive
Proceedings of the 24th annual international symposium on Microarchitecture table of contents
Albuquerque, New Mexico, Puerto Rico
Pages: 69 - 73  
Year of Publication: 1991
ISBN:0-89791-460-0
Authors
William Y. Chen  Center for Reliable and High-Performance Computing, University of Illinois, Urbana, Illinois
Scott A. Mahlke  Center for Reliable and High-Performance Computing, University of Illinois, Urbana, Illinois
Pohua P. Chang  Center for Reliable and High-Performance Computing, University of Illinois, Urbana, Illinois
Wen-mei W. Hwu  Center for Reliable and High-Performance Computing, University of Illinois, Urbana, Illinois
Sponsors
IEEE-CS : Computer Society
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 1,   Downloads (12 Months): 9,   Citation Count: 32
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

1
Michael Butler , Tse-Yu Yeh , Yale Patt , Mitch Alsup , Hunter Scales , Michael Shebanow, Single instruction stream parallelism is greater than two, Proceedings of the 18th annual international symposium on Computer architecture, p.276-286, May 27-30, 1991, Toronto, Ontario, Canada
 
2
W. Y. Chen, "An optimizing compiler code generator: A platform for RISC performance analysis," Master's thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana- Champaign, Illinois, 1991.
3
David Callahan , Ken Kennedy , Allan Porterfield, Software prefetching, Proceedings of the fourth international conference on Architectural support for programming languages and operating systems, p.40-52, April 08-11, 1991, Santa Clara, California, United States
4
Alexander C. Klaiber , Henry M. Levy, An architecture for software-controlled data prefetching, Proceedings of the 18th annual international symposium on Computer architecture, p.43-53, May 27-30, 1991, Toronto, Ontario, Canada
5
Robert P. Colwell , Robert P. Nix , John J. O'Donnell , David B. Papworth , Paul K. Rodman, A VLIW architecture for a trace scheduling compiler, Proceedings of the second international conference on Architectual support for programming languages and operating systems, p.180-192, October 1987, Palo Alto, California, United States
 
6
David Kroft, Lockup-free instruction fetch/prefetch cache organization, Proceedings of the 8th annual symposium on Computer Architecture, p.81-87, May 12-14, 1981, Minneapolis, Minnesota, United States
7
Gurindar S. Sohi , Manoj Franklin, High-bandwidth data memory systems for superscalar processors, Proceedings of the fourth international conference on Architectural support for programming languages and operating systems, p.53-62, April 08-11, 1991, Santa Clara, California, United States
8
Pohua P. Chang , Scott A. Mahlke , William Y. Chen , Nancy J. Warter , Wen-mei W. Hwu, IMPACT: an architectural framework for multiple-instruction-issue processors, Proceedings of the 18th annual international symposium on Computer architecture, p.266-275, May 27-30, 1991, Toronto, Ontario, Canada

CITED BY  32
Dean M. Tullsen , Susan J. Eggers, Limitations of cache prefetching on a bus-based multiprocessor, ACM SIGARCH Computer Architecture News, v.21 n.2, p.278-288, May 1993
T.-F. Chen , J.-L. Baer, A performance study of software and hardware data prefetching schemes, ACM SIGARCH Computer Architecture News, v.22 n.2, p.223-232, April 1994
Bryan Black , Brian Mueller , Stephanie Postal , Ryan Rakvic , Noppanunt Utamaphethai , John Paul Shen, Load execution latency reduction, Proceedings of the 12th international conference on Supercomputing, p.29-36, July 1998, Melbourne, Australia
Marius Pirvu , Laxmi Bhuyan, Hardware spatial forwarding for widely shared data, Proceedings of the 14th international conference on Supercomputing, p.264-273, May 08-11, 2000, Santa Fe, New Mexico, United States
Todd C. Mowry , Monica S. Lam , Anoop Gupta, Design and evaluation of a compiler algorithm for prefetching, ACM SIGPLAN Notices, v.27 n.9, p.62-73, Sept. 1992
Jin-Ho Lee , Min-Young Lee , Seong-Uk Choi , Myong-Soon Park, Reducing cache conflicts in data cache prefetching, ACM SIGARCH Computer Architecture News, v.22 n.4, p.71-77, Sept. 1994
Sanjeev Kumar , Christopher Wilkerson, Exploiting spatial locality in data caches using spatial footprints, ACM SIGARCH Computer Architecture News, v.26 n.3, p.357-368, June 1998
Zheng Zhang , Josep Torrellas, Speeding up irregular applications in shared-memory multiprocessors: memory binding and group prefetching, ACM SIGARCH Computer Architecture News, v.23 n.2, p.188-199, May 1995
Chi-Keung Luk , Todd C. Mowry, Compiler-based prefetching for recursive data structures, ACM SIGOPS Operating Systems Review, v.30 n.5, p.222-233, Dec. 1996
William Y. Chen , Roger A. Bringmann , Scott A. Mahlke , Richard E. Hank , James E. Sicolo, An efficient architecture for loop based data preloading, ACM SIGMICRO Newsletter, v.23 n.1-2, p.92-101, Dec. 1992
Chi-Hung Chi , Chin-Ming Cheung, Hardware-driven prefetching for pointer data references, Proceedings of the 12th international conference on Supercomputing, p.377-384, July 1998, Melbourne, Australia
 
Jean-Loup Baer , Tien-Fu Chen, Effective Hardware-Based Data Prefetching for High-Performance Processors, IEEE Transactions on Computers, v.44 n.5, p.609-623, May 1995
Dean M. Tullsen , Susan J. Eggers, Effective cache prefetching on bus-based multiprocessors, ACM Transactions on Computer Systems (TOCS), v.13 n.1, p.57-88, Feb. 1995
Parthasarathy Ranganathan , Vijay S. Pai , Hazim Abdel-Shafi , Sarita V. Adve, The interaction of software prefetching with ILP processors in shared-memory systems, ACM SIGARCH Computer Architecture News, v.25 n.2, p.144-156, May 1997
 
Andrew S. Huang , John P. Shen, A limit study of local memory requirements using value reuse profiles, Proceedings of the 28th annual international symposium on Microarchitecture, p.71-81, November 29-December 01, 1995, Ann Arbor, Michigan, United States
Andrew S. Huang , John Paul Shen, The intrinsic bandwidth requirements of ordinary programs, ACM SIGPLAN Notices, v.31 n.9, p.105-114, Sept. 1996
Doug Burger , James R. Goodman , Alain Kägi, Memory bandwidth limitations of future microprocessors, ACM SIGARCH Computer Architecture News, v.24 n.2, p.78-89, May 1996
Mikko H. Lipasti , Christopher B. Wilkerson , John Paul Shen, Value locality and load value prediction, ACM SIGPLAN Notices, v.31 n.9, p.138-147, Sept. 1996
 
Viji Srinivasan , Edward S. Davidson , Gary S. Tyson, A Prefetch Taxonomy, IEEE Transactions on Computers, v.53 n.2, p.126-140, February 2004
Mark Horowitz , Margaret Martonosi , Todd C. Mowry , Michael D. Smith, Informing memory operations: providing memory performance feedback in modern processors, ACM SIGARCH Computer Architecture News, v.24 n.2, p.260-270, May 1996
Yoji Yamada , John Gyllenhall , Grant Haab , Wen-mei Hwu, Data relocation and prefetching for programs with large data sets, Proceedings of the 27th annual international symposium on Microarchitecture, p.118-127, November 30-December 02, 1994, San Jose, California, United States
 
Mikko H. Lipasti , William J. Schmidt , Steven R. Kunkel , Robert R. Roediger, SPAID: software prefetching in pointer- and call-intensive environments, Proceedings of the 28th annual international symposium on Microarchitecture, p.231-236, November 29-December 01, 1995, Ann Arbor, Michigan, United States
 
Toshihiro Ozawa , Yasunori Kimura , Shin'ichiro Nishizaki, Cache miss heuristics and preloading techniques for general-purpose programs, Proceedings of the 28th annual international symposium on Microarchitecture, p.243-248, November 29-December 01, 1995, Ann Arbor, Michigan, United States
Teresa L. Johnson , Wen-mei W. Hwu, Run-time adaptive cache hierarchy management via reference analysis, ACM SIGARCH Computer Architecture News, v.25 n.2, p.315-326, May 1997
Steven P. Vanderwiel , David J. Lilja, Data prefetch mechanisms, ACM Computing Surveys (CSUR), v.32 n.2, p.174-199, June 2000
 
Teresa L. Johnson , Matthew C. Merten , Wen-Mei W. Hwu, Run-time spatial locality detection and optimization, Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture, p.57-64, December 01-03, 1997, Research Triangle Park, North Carolina, United States
 
Edward H. Gornish , Alexander Veidenbaum, An Integrated Hardware/Software Data Prefetching Scheme for Shared-Memory Multiprocessors, International Journal of Parallel Programming, v.27 n.1, p.35-70, Feb. 1999
 
Chi-Keung Luk , Todd C. Mowry, Automatic Compiler-Inserted Prefetching for Pointer-Based Applications, IEEE Transactions on Computers, v.48 n.2, p.134-141, February 1999
 
Teresa L. Johnson , Daniel A. Connors , Matthew C. Merten , Wen-mei W. Hwu, Run-Time Cache Bypassing, IEEE Transactions on Computers, v.48 n.12, p.1338-1354, December 1999
 
Mikko H. Lipasti , John Paul Shen, Exploiting Value Locality to Exceed the Dataflow Limit, International Journal of Parallel Programming, v.26 n.4, p.505-538, August 1998
 
Mikko H. Lipasti , John Paul Shen, Exceeding the dataflow limit via value prediction, Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture, p.226-237, December 02-04, 1996, Paris, France
 
Xiaotong Zhuang , Hsien-Hsin S. Lee, Reducing Cache Pollution via Dynamic Data Prefetch Filtering, IEEE Transactions on Computers, v.56 n.1, p.18-31, January 2007

INDEX TERMS

Primary Classification:
  C. Computer Systems Organization
  C.4 PERFORMANCE OF SYSTEMS
      Subjects: Performance attributes

Additional Classification:
  D. Software
  D.3 PROGRAMMING LANGUAGES
      D.3.4 Processors
          Subjects: Compilers


General Terms:
Measurement, Performance, Theory

Collaborative Colleagues:
William Y. Chen: colleagues
Scott A. Mahlke: colleagues
Pohua P. Chang: colleagues
Wen-mei W. Hwu: colleagues

Peer to Peer - Readers of this Article have also read:

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