| Efficient obstacle-avoiding rectilinear steiner tree construction |
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International Symposium on Physical Design
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Proceedings of the 2007 international symposium on Physical design
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Austin, Texas, USA
SESSION: Routing
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Pages: 127 - 134
Year of Publication: 2007
ISBN:978-1-59593-613-4
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Authors
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Chung-Wei Lin
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National Taiwan University, Taipei, Taiwan Roc
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Szu-Yu Chen
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National Taiwan University, Taipei, Taiwan Roc
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Chi-Feng Li
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National Taiwan University, Taipei, Taiwan Roc
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Yao-Wen Chang
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National Taiwan University, Taipei, Taiwan Roc
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Chia-Lin Yang
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National Taiwan University, Taipei, Taiwan Roc
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Downloads (6 Weeks): 4, Downloads (12 Months): 64, Citation Count: 8
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ABSTRACT
Given a set of pins and a set of obstacles on a plane, an obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) connects these pins, possibly through some additional points (called Steiner points), and avoids running through any obstacle to construct a tree with a minimal total wirelength. The OARSMT problem becomes more important than ever for modern nanometer IC designs which need to consider numerous routing obstacles incurred from power networks, prerouted nets, IP blocks, feature patterns for manufacturability improvement, antenna jumpers for reliability enhancement, etc. Consequently, the OARSMT problem has received dramatically increasing attention recently. Nevertheless, considering obstacles significantly increases the problem complexity, and thus most previous works suffer from either poor quality or expensive running time. Based on the obstacle-avoiding spanning graph (OASG), this paper presents an efficient algorithm with some theoretical optimality guarantees for the OARSMT construction. Unlike previous heuristics, our algorithm guarantees to find an optimal OARSMT for any 2-pin net and many higher-pin nets. Extensive experiments show that our algorithm results in significantly shorter wirelengths than all state-of-the-art works.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 8
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Chung-Wei Lin , Shih-Lun Huang , Kai-Chi Hsu , Meng-Xiang Li , Yao-Wen Chang, Efficient multi-layer obstacle-avoiding rectilinear Steiner tree construction, Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design, November 05-08, 2007, San Jose, California
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Chih-Hung Liu , Yao-Hsin Chou , Shih-Yi Yuan , Sy-Yen Kuo, Efficient multilayer routing based on obstacle-avoiding preferred direction steiner tree, Proceedings of the 2008 international symposium on Physical design, April 13-16, 2008, Portland, Oregon, USA
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Prashant Saxena , Vishal Khandelwal , Changge Qiao , Pei-Hsin Ho , J.-C. Lin , Mahesh A. Iyer, On improving optimization effectiveness in interconnect-driven physical synthesis, Proceedings of the 2009 international symposium on Physical design, March 29-April 01, 2009, San Diego, California, USA
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