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Optical interconnects: a viable solution for interconnection beyond 10 gbit/sec
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International Symposium on Physical Design archive
Proceedings of the 2007 international symposium on Physical design table of contents
Austin, Texas, USA
SESSION: Future interconnects table of contents
Pages: 85 - 86  
Year of Publication: 2007
ISBN:978-1-59593-613-4
Author
Ray T. Chen  University of Texas, Austin, TX
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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ABSTRACT

The speed and complexity of integrated circuits are increasing rapidly as integrated circuit technology advances from very-large-scale integrated (VLSI) circuits to ultra-large-scale integrated (ULSI) circuits. As the number of devices per chip, the number of chips per board, the modulation speed, and the degree of integration continue to increase, electrical interconnects are facing their fundamental bottlenecks, such as speed, packaging, fan-out, and power dissipation. In the quest for high-density packaging of electronic circuits, the construction of multichip modules (MCM), which decrease the surface area by removing package walls between chips, improved signal integrity by shortening interconnection distances and removing impedance problems and capacitances. The employment of copper and materials with lower dielectric constant materials can release the bottleneck in a chip level for the next several years. The International Technology Roadmap for Semiconductors (ITRS) expects that on-chip local clock speed will constantly increase to 10 GHz by the year 2011. Electrical interconnects operating at a high-frequency region have many problems to be solved, such as crosstalk, impedance matching, power dissipation, skew, and packing density. Optical interconnection has several advantages, such as immunity to the electromagnetic interference, independency to impedance mismatch, less power consumption, and high-speed operation. Although the optical interconnects have great advantages compared with the copper/low K interconnection, they still have some difficulties regarding packaging, multilayer technology, signal tapping, and reworkability. In this presentation, the progress of optical interconnect for intra and inter-board levels will be presented with both passive and active components suitable for system integration including thin film planar waveguides, vertical cavity surface emitting lasers (VCSELs), PIN photodiode array and silicon nano-photonic crystal waveguide modulators.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
K. Cho, K. B. Yoon, S. H. Ahn, and H. K. Sung, "Experimental demonstration of 10Gbit/s transmission with an optical backplane system using optical slots," Optics letters, Vol.30, No.13, pp.1635--1637 (2005)
 
2
X. Wang, L. Wang, W. Jiang, and R. T. Chen, "Hard-molded 51 cm long waveguide array with a 150GHz bandwidth for board level optical interconnects," will be published in Optics Letters, Vol.32, no.7, April 2007
 
3
R. T. Chen, L. Lin, C. Choi, Y. Liu, B. Bihari, L. Wu, S. Tang, R. Wickman, B. Picor, M. K. Hibbs-brenner, J. Bristow, and Y. S. Liu, "Fully Embedded Board-Level Guided Wave Optoelectronic Interconnects," Proc. Of the IEEE, vol.88, no.6, pp.780--794, 2000
 
4
X., Han, G. Kim, G. J. Lipovski, and R. T. Chen, "An optical centralized shared-bus architecture demonstrator for microprocessor-to-memory interconnects," IEEE J. Sel. Topics Quantum Electron., vol.9, no. 2, pp. 512--512 (2003)
 
5
H.Bi, X. Han, X. Chen, W. iang, J. Choi, and R. T. Chen, "15Gbps Bit-Interleaved Optical Backplane Bus using Volume Photo-polymer Holograms," IEEE Photonics Technology Letters, Vol.18, pp.2165--2167 (2006)
 
6
R. T. Chen, "VME Optical Backplane Bus for High Performance Computer," Optoelectronics-Devices and Technologies, Vol.9, No.1, pp.81--94 (1994)
 
7
R. T. Chen, "System, Method and Apparatus for Improved Electrical-to-Optical Transmitters Disposed Within Printed Circuit Boards", U.S. Patent No. 7,112,885 (2004)