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Performance-driven constructive placement
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 27th ACM/IEEE Design Automation Conference table of contents
Orlando, Florida, United States
Pages: 103 - 106  
Year of Publication: 1991
ISBN:0-89791-363-9
Authors
Ichiang Lin  Department of Computer Science, University of Minnesota, Minneapolis, MN
David H. C. Du  Department of Computer Science, University of Minnesota, Minneapolis, MN
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS : Computer Society
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 1,   Downloads (12 Months): 6,   Citation Count: 6
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ABSTRACT

A new approach to the performance-driven placement based on a window concept is presented. We first convert timing constraints to geometric shapes using the defined windows. A window represents a region in which all the modules along a given path can be placed without degrading the circuit performance. Then a constructive placement process uses the window information to select an unplaced module, and to find an appropriate position for the module. This approach represents a unified way to consider both timing and geometric constraints during the placement process. The experimental results show that the improvement of circuit performance can be achieved by the sufficient use of the window information.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

Burs85
 
Dunlop84
 
Hauge87
P.S. Hauge, R. Nair, E J, Yoff,, "Circuit Placement For Predictable Performance", ICCAD, 1987, pp.88-91.
 
Hitch82
R.B. Hitchcock, G.L. Smith, D.D. Cheng, "Timing Analysis. of Computer Hardware", IBM J. Res. Develop., vol,26, no. I, Jan. 1982, pp.100-105.
Jack89
 
Lin90
I. Lin, D,H. Du, "Window Based Pedortrutnce-Ddven Placement", Technical Report, TR-90-18, Comlmt~r Science Department, University of Minnesota.
 
Mare89
M. Marek-Sadowska, S.P. Lin, "T'tming Driven Plac~nnnt", ICCAD-89, 1989, pp.94-97.
 
Nair89
R. Nair, C.L. Bennan, P.S. Hauge, E.L Yoffa, "Generation of Performance Constraints for Layout", IEEE Trans. CAD, vol.8, no.8, Aug. 1989, pp.860-874.
Pras89
 
Rose88
M. Rose, M. Wiesel, D. Kirkpatrick, N. Netilcten, "Dc~u0 Performance Directed, Auto Place and Route", 1988 Custom ICC, pp.l i.1.1-11.1.4.
 
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S. Teig, R.L. Smith, J. Scaton, "Timhag-Drivem Layout of Cell-Based ICs", VLSI System Design, May 1986, pp.63-73.
 
Weste85
 
Youss89
H. Youssef, E. Shragowitr., LC. B~aing, "Critical Path Issue in VLSI Designs", ICCAD-89, 1989, pp.520-523.

CITED BY  6
 
 

Collaborative Colleagues:
Ichiang Lin: colleagues
David H. C. Du: colleagues

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