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An ultra low-power class-AB sinh integrator
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Proceedings of the 19th annual symposium on Integrated circuits and systems design table of contents
Ouro Preto, MG, Brazil
SESSION: Low power and analog design table of contents
Pages: 74 - 79  
Year of Publication: 2006
ISBN:1-59593-479-0
Authors
Sandro A. P. Haddad  Delft University of Technology, Delft, The Netherlands
Wouter A. Serdijn  Delft University of Technology, Delft, The Netherlands
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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ABSTRACT

A new ultra low-power Class-AB Sinh integrator is proposed here. The translinear companding integrator is based on hyperbolic-sine transconductors and uses only one grounded capacitor to implement a Class-AB integrator, which saves considerable chip area. Furthermore, the proposed circuit presents excellent performance with respect to power efficiency. To validate the circuit principle, the integrator has been simulated in standard 35 μm CMOS technology and designed to operate from a 1.5-V (± 0.75V) supply voltage, with a current consumption of only 14nA. The THD is kept below 1%, with a modulation index as high as 20 and yields a 75-dB dynamic range at the 1-dB compression point.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
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2
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3
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4
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7
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9
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Collaborative Colleagues:
Sandro A. P. Haddad: colleagues
Wouter A. Serdijn: colleagues