| Reliability modeling and management in dynamic microprocessor-based systems |
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Annual ACM IEEE Design Automation Conference
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Proceedings of the 43rd annual Design Automation Conference
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San Francisco, CA, USA
SESSION: Session 58: advanced methods for interconnect extraction, clocks and reliability
table of contents
Pages: 1057 - 1060
Year of Publication: 2006
ISBN:1-59593-381-6
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Downloads (6 Weeks): 9, Downloads (12 Months): 73, Citation Count: 1
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ABSTRACT
Reliability failure mechanisms, such as time dependent dielectric breakdown, electromigration, and thermal cycling have become a key concern in processor design. The traditional approach to reliability qualification assumes that the processor will operate at maximum performance continuously under worst case voltage and temperature conditions. However, the typical processor spends a very small fraction of its operational time at maximum voltage and temperature. In this paper, we show how this results in a reliability "slack" that can be leveraged to provide increased performance during periods of peak processor demand. We develop a novel, real time reliability model based on workload driven conditions. We then propose a new dynamic reliability management (DRM) scheme that results in 20-35% performance improvement during periods of peak computational demand while ensuring the required reliability lifetime.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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