Preliminary performance evaluation of an adaptive dynamic extensible processor for embedded applications

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Preliminary performance evaluation of an adaptive dynamic extensible processor for embedded applications

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Symposium on Applied Computing archive
Proceedings of the 2006 ACM symposium on Applied computing table of contents

Dijon, France

SESSION: Poster papers table of contents

Pages: 937 - 938

Year of Publication: 2006

ISBN:1-59593-108-2

Authors

Hamid Noori	Kyushu University, Kasuga, Fukuoka, Japan
Kazuaki Murakami	Kyushu University, Kasuga, Fukuoka, Japan

Sponsor

SIGAPP: ACM Special Interest Group on Applied Computing

Publisher

ACM New York, NY, USA

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Downloads (6 Weeks): 2, Downloads (12 Months): 13, Citation Count: 0

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ABSTRACT

In this research we investigate an approach for adaptive dynamic instruction set extension, tuning processors to specific applications after fabrication.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Zhi Alex Ye , Andreas Moshovos , Scott Hauck , Prithviraj Banerjee, CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit, Proceedings of the 27th annual international symposium on Computer architecture, p.225-235, June 2000, Vancouver, British Columbia, Canada
	2	http://www.eecs.umich.edu/mibench/
	3	http://ww.simplescalar.com/