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Sequential consistency versus linearizability (extended abstract)
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Source ACM Symposium on Parallel Algorithms and Architectures archive
Proceedings of the third annual ACM symposium on Parallel algorithms and architectures table of contents
Hilton Head, South Carolina, United States
Pages: 304 - 315  
Year of Publication: 1991
ISBN:0-89791-438-4
Authors
Hagit Attiya  Department of Computer Science, The Technion, Haifa 32000, Israel
Jennifer L. Welch  Department of Computer Science, University of North Carolina, Chapel Hill, NC
Sponsors
SIGACT: ACM Special Interest Group on Algorithms and Computation Theory
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 1,   Downloads (12 Months): 13,   Citation Count: 8
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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M. Ahamad, P. Hutto, and R. John, Implementing and Programming Causal Distributed Shared Memory, TR GIT-CC-90-49, Georgia Inst. of Tech., December 1990.
 
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H. Attiya, "Implementing FIFO Queues and Stacks," in preparation.
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R. Bisiani, A. Nowatzyk, and M. Ravishankar, "Coherent Shared Memory on a Distributed Memory Machine," Proc. 1CPP, 1989, pp. 1-133-141.
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W. Brantley, K. McAuliffe, and J. Weiss, "RP3 Processor-Memory Element," Proc. 1CPP, 1985, pp. 782-789.
 
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W. W. Collier, "Architectures for Systems of Parallel Processes," IBM TR 00.3253, Poughkeepsie, NY, January 1984.
 
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E. W. Dijkstra, "Hierarchical Ordering Of Sequential Processes," Acta ln}ormatica, 1971, pp. 115- 138.
 
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P. Hutto and M. Ahamad, Slow Memory: Weakening Consistency to Enhance Concurrency in Distributed Shared Memories, TR GIT-ICS-89/39, Georgia Inst. of Tech., October 1989.
 
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L. Lamport, "How to Make a Multiprocessor Computer that Correctly Executes Multiprocess Programs," IEEE Trans. on Computers, vol. C.-28, no. 9, pp. 690-691.
 
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L. Lamport, "On Interprocess Communication. Parts I and II," Distributed Computing, vo}. 1, no. 2 (1986), pp. 77-101.
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R. Lipton and J. Sandberg, PRAM: A Scalable Shared Memory, TR CS-TR-180-88, Princeton University, September 1988.
 
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J. Lundelius and N. Lynch, "An Upper and Lower Bound for Clock Synchronization," Information and Control, vol. 62, Nos. 2/3, pp. 190-204.
 
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S. Min and J. Baer, "A Timestamp-Based Cache Coherence Scheme," Proc. 1CPP, 1989, pp. 1-23- 32.
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U. Ramachandran, M. Ahamad, and M. Y. Khalidi, "Coherence of Distributed Shared Memory: Unifying Synchronization and Data Transfer," Proc. ICPP, 1989, pp. II-160-169.
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CITED BY  8

Collaborative Colleagues:
Hagit Attiya: colleagues
Jennifer L. Welch: colleagues

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