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Optimal placement by branch-and-price
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Source Asia and South Pacific Design Automation Conference archive
Proceedings of the 2005 Asia and South Pacific Design Automation Conference table of contents
Shanghai, China
SESSION: Placement techniques table of contents
Pages: 337 - 342  
Year of Publication: 2005
ISBN:0-7803-8737-6
Authors
Pradeep Ramachandaran  SUNY Binghamton SSIE
Ameya R. Agnihotri  CSD
Satoshi Ono  CSD
Purushothaman Damodaran  SUNY Binghamton SSIE
Krishnaswami Srihari  SUNY Binghamton SSIE
Patrick H. Madden  CSD
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
: Shanghai IC Industry Association
: IEEE SSCS Shanghai Chapter
: IEEE CAS
: IEEE Beijing Section
: Fudan University
: Chinese Institute of Electronics
Publisher
ACM  New York, NY, USA
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ABSTRACT

Circuit placement has a large impact on all aspects of performance; speed, power consumption, reliability, and cost are all affected by the physical locations of interconnected transistors. The placement problem is NP-Complete for even simple metrics.In this paper, we apply techniques developed by the Operations Research (OR) community to the placement problem. Using an Integer Programming (IP) formulation and by applying a "branch-and-price" approach, we are able to optimally solve placement problems that are an order of magnitude larger than those addressed by traditional methods. Our results show that suboptimality is rampant on the small scale, and that there is merit in increasing the size of optimization windows used in detail placement.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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Collaborative Colleagues:
Pradeep Ramachandaran: colleagues
Ameya R. Agnihotri: colleagues
Satoshi Ono: colleagues
Purushothaman Damodaran: colleagues
Krishnaswami Srihari: colleagues
Patrick H. Madden: colleagues