ACM Home Page
Please provide us with feedback. Feedback
An efficient subcircuit recognition using the nonlinear graph matching
Full text PdfPdf (241 KB)
Source SBCCI archive
Proceedings of the 18th annual symposium on Integrated circuits and system design table of contents
Florianolpolis, Brazil
SESSION: CAD methods and synthesis table of contents
Pages: 44 - 49  
Year of Publication: 2005
ISBN:1-59593-174-0
Author
Nikolay Rubanov  Magma Design Automation, Santa Clara, CA
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 3,   Downloads (12 Months): 16,   Citation Count: 0
Additional Information:

abstract   references   index terms  

Tools and Actions: Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/1081081.1081099
What is a DOI?

ABSTRACT

Subcircuit recognition (SR) is a problem of identifying all instances of a small subcircuit in a larger circuit. Despite recent progress toward the linear graph matching based SR algorithms, finding a large set of subcircuits in a multi-million circuit may be still prohibitively long for many IC CAD applications. In this paper we develop a new efficient SR method using a nonlinear graph matching strategy. Namely, our method employs an advanced nonlinear technique to minimize the objective function (OF) associated with the SR problem. Unlike the linear graph matching we don't approximate the OF by the first-order terms in its Taylor series expansion. In contrast, the second-order terms are exploited to form a set of nonlinear equations (SNE) that describe the net and device match probabilities. To solve the obtained SNE we use a nonlinear version of the Kaczmarz method (KM). We improve the KM efficiency by making two modifications in its updating scheme; this leads to fast and stable convergence of the SR process. The experimental results show that the new method is on average three times faster compared to the linear graph matching algorithms.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
2
 
3
Pelz, G., Röttcher, U. Pattern Matching and Refinement Hybrid Approach to Circuit Comparison. IEEE Trans., V. CAD-10, N. 2, 1994, 264--276.
 
4
Kim, W., Shin, H. Hierarchical LVS based on hierarchy rebuilding. Proceedings of the ASP-DAC Conference, 1998, 379-384.
 
5
Rangarajan, A., Yuille, A., Mjolsness, E. A Convergence Proof for the Softassign Quadratic Assignment Algorithm. Advances in NIP Systems 9, 1997, MIT Press, Cambridge, MA, 620--626.
 
6
Rubanov, N. SubIslands: The Probabilistic Match Assignment Algorithm for Subcircuit Recognition. IEEE Trans., V. CAD-22, N. 1, 2003, 26--38.
 
7
 
8
Natterer, F., Numerical Solution of Bilinear Inverse Problems. Preprint, Numeric Department, Westfalische-Wilhelms University Muenster, Germany, 1996.