Energy efficient NoC design

ABSTRACT

Energy efficiency is a key concern in the design of advanced SoC platforms. In this talk we will explore the delicate interplay between on-chip communication and power consumption. We will move from state-of-the art communication fabrics (shared buses, crossbars), to advanced, "revolutionary" network-on-chip interconnects. We will touch upon several energy optimization and management problems emerging in the design and tuning of on-chip interconnects. Our analysis will show that energy-efficient on-chip communication is one of the cornerstones of system-level energy optimization.