High level design: the future is now

ABSTRACT

High-level design can generally be described as the process of designing hardware starting from an executable specification and proceeding to increasingly detailed representations. Until recently, design automation tools have not been sufficient to allow a continuous sequence of small transformations from algorithmic specification to acceptable implementation. As high-level synthesis tools are maturing to the point where high-level design is practical, the ramifications are becoming apparent. Architectural exploration, RTL that is correct by construction, and verification efficiency have all been widely anticipated, though perhaps not fully appreciated. Other attributes of using high-level synthesis are only now becoming apparent, including the value of global optimization, the effects of regular RTL on downstream design tools, and the effects on IP reuse. As maturing high-level synthesis increasingly enables high-level design, these effects will have a profound influence on the resulting hardware, the design tool chain, and the design process.