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Probabilistic dual-Vth leakage optimization under variability
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Source International Symposium on Low Power Electronics and Design archive
Proceedings of the 2005 international symposium on Low power electronics and design table of contents
San Diego, CA, USA
SESSION: Circuit-level optimizations table of contents
Pages: 143 - 148  
Year of Publication: 2005
ISBN:1-59593-137-6
Authors
Azadeh Davoodi  University of Maryland, College Park, MD
Ankur Srivastava  University of Maryland, College Park, MD
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

In this paper we address the problem of growing leakage variability through effective dual-threshold voltage assignment. We propose a probabilistic dynamic programming-based method to assign dual-threshold voltages such that the overall expected leakage is minimized under a given probability of violating the timing constraint (timing yield). The key characteristics of our strategy are two pruning criteria that stochastically identify pareto-optimal solutions and prune the sub-optimal ones. Compared to other variability-driven dual-threshold voltage assignment schemes, the main advantages of our approach are 1) considering correlations due to common sources of variation, 2) providing controllable runtime, which in one of the proposed strategies is comparable to the deterministic algorithm, and 3) performing optimization based on all the signal paths simultaneously, as opposed to one path at a time. Experimental results indicate that the proposed probabilistic scheme is significantly better than a comparable deterministic dual-threshold voltage assignment, both in terms of expected leakage and the probability of violating the timing constraint


REFERENCES

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Collaborative Colleagues:
Azadeh Davoodi: colleagues
Ankur Srivastava: colleagues