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Recursive bisection placement: feng shui 5.0 implementation details
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Source International Symposium on Physical Design archive
Proceedings of the 2005 international symposium on Physical design table of contents
San Francisco, California, USA
SESSION: 2005 ISPD placement contest table of contents
Pages: 230 - 232  
Year of Publication: 2005
ISBN:1-59593-021-3
Authors
Ameya R. Agnihotri  SUNY Binghamton CSD, Binghamton, NY
Satoshi Ono  University of Kitakyushu, Binghamton, NY
Patrick H. Madden  University of Kitakyushu, Binghamton, NY
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 7,   Downloads (12 Months): 54,   Citation Count: 14
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ABSTRACT

In this paper, we summarize circuit placement techniques and algorithms developed by the BLAC CAD research group; these have been integrated into our recursive bisection based placement tool feng shui. We also briefly describe current research interests.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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A. E. Dunlop and B. W. Kernighan. A procedure for placement of standard-cell VLSI circuits. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, CAD-4(1):92--98, January 1985.
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D. Hill. US patent 6,370,673: Method and system for high speed detailed placement of cells within an integrated circuit design, 2002.
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S. Kirkpatrick, C. D. Gelatt, and M. P. Vecchi. Optimization by simulated annealing. Science, 220(4598):671--680, May 1983.
 
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J. Kleinhans, G. Sigl, F. Johannes, and K. Antreich. GORDIAN: VLSI placement by quadratic programming and slicing optimization. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 10(3):356--365, 1991.
 
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C. Li and C.-K. Koh. On improving recursive bipartitioning-based placement. Technical Report TR-ECE-03-14, Purdue University ECE, 2003.
 
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P. R. Suaris and G. Kedem. An algorithm for quadrisection and its application to standard cell placement. IEEE Trans. on Circuits and Systems, 35(3):394--303, 1988.
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CITED BY  14
 
 
 
 
 
 

Collaborative Colleagues:
Ameya R. Agnihotri: colleagues
Satoshi Ono: colleagues
Patrick H. Madden: colleagues