| A dynamic element matching circuit for multi-bit delta-sigma modulators |
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Asia and South Pacific Design Automation Conference
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Proceedings of the 2004 Asia and South Pacific Design Automation Conference
table of contents
Yokohama, Japan
SESSION: (Special session) presentation + poster disscussion: university design contest
table of contents
Pages: 569 - 570
Year of Publication: 2004
ISBN:0-7803-8175-0
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Authors
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Ryozo Katoh
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Sophia University, Kiocho, Chiyoda-ku, Tokyo, Japan
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Shin-ya Kobayashi
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Sophia University, Kiocho, Chiyoda-ku, Tokyo, Japan
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Takao Waho
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Sophia University, Kiocho, Chiyoda-ku, Tokyo, Japan
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IEEE Press
Piscataway, NJ, USA
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Downloads (6 Weeks): 2, Downloads (12 Months): 13, Citation Count: 0
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 ABSTRACT
A 30k-gate dynamic element matching circuit for bandpass modulators with a 4-bit quantizer is designed by using 0.35-μm CMOS technology. Second-order bandpass mismatch-shaping algorithm improves the signal-to-noise ratio by ~30dB (~5 bit). The core circuit area and the estimated operation speed were 1.44 mm2 and 20 MHz, respectively.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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L. R. Carley, "A Noise-Shaping Coder Topology for Bit Converters," IEEE J. Solid-State Circuits, Vol. 24, pp. 267--273, 1989
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I. Fujimori, L. Longo, A. Hairapetian, K. Seiyama, S. Kosic, J. Cao, and S. -L. Chan, "A 90-dB SNR 2.5 MHz Output-Rate ADC Using Cascaded Multibit Delta-Sigma Modulation at 8x Oversampling Ratio," IEEE J. Solid-State Circuits, Vol. 35 pp. 1280--1828, 2000.
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A. Yasuda, H. Tanimoto, and T. Iida, "A 100kHz, 9.6mW Multi-bit ΔΣ DAC and ADC using Noise Shaping Dynamic Element Matching with a Tree Structure" IEEE ISSCC Dig. of Tech. papers, Vol. 41, pp. 64--65, Feb. 1998.
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T. Shui, R. Schreier, F. Hudson, "Mismatch Shaping for a Current-Mode Multibit Delta-Sigma DAC," IEEE J. Solid-State Circuits, Vol. 34, pp. 331--358, 1999.
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